The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 22, 2011
Filed:
Oct. 25, 2005
Applicant:
William M. Gervasi, Ladera Ranch, CA (US);
Inventor:
William M. Gervasi, Ladera Ranch, CA (US);
Assignee:
Stec, Inc., Santa Ana, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01);
U.S. Cl.
CPC ...
Abstract
A registered dual in-line memory module is configured with multiple random access memory chips and a DRAM register configured to receive address and control signals from a memory controller. The DRAM register distributes the address and control signals to the random access memory chips, thereby providing the memory controller access to the chips. The module further includes a control register configured to store control bits for setting operating modes of the registered dual in-line memory module. The control bits are software programmable using signals received from the memory controller.