The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 22, 2011
Filed:
Jun. 03, 2009
Yoji Nishio, Chuo-ku, JP;
Atsushi Hiraishi, Chuo-ku, JP;
Yoji Nishio, Chuo-ku, JP;
Atsushi Hiraishi, Chuo-ku, JP;
Elpida Memory, Inc., Tokyo, JP;
Abstract
In a multi-rank memory module having a terminal resistance of a data input/output padand a terminal resistance control padthat inputs a signal that controls on/off of the terminal resistance, a high-speed operation is enabled with the aid of an enclosed terminal resistance, even in cases where the number of ranks is greater than that of terminal resistance control terminals (ODT terminals) provided on the memory module. To this end, a terminal resistance control padof a memory chip, having a longer length of an interconnect between a data buson a module substrateand a data input/output pad, is connected to a terminal resistance control interconnectorto control the on/off of the terminal resistance from the ODT terminal. A terminal resistance control pad on a memory chip, having a shorter length of an interconnect between the data buson the module substrate and the data input/output pad, is connected to a fixed potentialto turn on the terminal resistance.