The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 22, 2011
Filed:
Jul. 27, 2010
Raffaele Vecchione, Naples, IT;
Luigi Giuseppe Occhipinti, Ragusa, IT;
Nunzia Malagnino, Torre Annunziata, IT;
Rossana Scaldaferri, Sapri, IT;
Maria Viviana Volpe, Pozzuoli, IT;
Raffaele Vecchione, Naples, IT;
Luigi Giuseppe Occhipinti, Ragusa, IT;
Nunzia Malagnino, Torre Annunziata, IT;
Rossana Scaldaferri, Sapri, IT;
Maria Viviana Volpe, Pozzuoli, IT;
STMicroelectronics S.R.L., Agrate Brianza (MI), IT;
Abstract
A method is for forming a vertical interconnection through a dielectric layer between upper and lower electrically conductive layers of an integrated circuit. The method includes forming an opening through the dielectric layer and placing a solidifiable electrically conductive filler into the opening via a printing technique. The solidifiable electrically conductive filler is solidified to thereby form a solidified electrically conducting filler in the opening. A metallization layer is formed over the dielectric layer and the solidified electrically conducting filler to thereby form the vertical interconnection through the dielectric layer between the upper and lower electrically conductive layers of the integrated circuit.