The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 15, 2011
Filed:
May. 28, 2010
Dinesh Maheshwari, Fremont, CA (US);
Dinesh Ramanathan, San Jose, CA (US);
Alakesh Chetia, Saratoga, CA (US);
Herve Letourneur, Mountain View, CA (US);
Donald W. Smith, Santa Clara, CA (US);
Manoj Gujral, Los Altos, CA (US);
Dinesh Maheshwari, Fremont, CA (US);
Dinesh Ramanathan, San Jose, CA (US);
Alakesh Chetia, Saratoga, CA (US);
Herve Letourneur, Mountain View, CA (US);
Donald W. Smith, Santa Clara, CA (US);
Manoj Gujral, Los Altos, CA (US);
Cypress Semiconductor Corporation, San Jose, CA (US);
Abstract
A disclosed circuit includes circuitry for coupling to a volatile memory, circuitry for coupling to a nonvolatile NAND flash memory, and circuitry that: (i) receives a volatile memory request from a processor and satisfies the volatile memory request by accessing the volatile memory, and (ii) receives a nonvolatile NOR flash memory read request from the processor and satisfies the NOR read request by accessing both the NAND flash memory and the volatile memory. The circuit may also include circuitry that receives a volatile memory request from another processor and satisfies the volatile memory request from the other processor by accessing the volatile memory, and circuitry that receives a NAND flash memory read request from the other processor and satisfies the NAND read request by accessing the NAND flash memory. Multiprocessor systems including the circuit are described, as is a method for satisfying a NOR flash memory read request.