The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 08, 2011
Filed:
Jun. 06, 2005
Method and apparatus to fabricate polymer arrays on patterned wafers using electrochemical synthesis
Valery M. Dubin, Portland, OR (US);
Florian Gstrein, Portland, OR (US);
Gordon D. Holt, Santa Clara, CA (US);
Brandon Barnett, Santa Clara, CA (US);
Valery M. Dubin, Portland, OR (US);
Florian Gstrein, Portland, OR (US);
Gordon D. Holt, Santa Clara, CA (US);
Brandon Barnett, Santa Clara, CA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A wafer having a plurality of dies (also called array chips) on the wafer, the die having an electrode to generate a deprotecting reagent, a working electrode to electrochemically synthesize a material, a confinement electrode adjacent to the working electrode to confine reactive reagents, and a die pad, wherein die pads of the plurality of dies are interconnected on the wafer to electrochemically synthesize the material in parallel on a plurality of working electrodes is disclosed. Also, a method for wafer-scale manufacturing of a plurality of dies and a method for electrochemically synthesizing a material in parallel on a plurality of dies on a wafer are disclosed.