The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 08, 2011
Filed:
Dec. 13, 2007
Rick Carter, Hopewell Junction, NY (US);
Michael P. Chudzik, Danbury, CT (US);
Rashmi Jha, Wappingers Falls, NY (US);
Naim Moumen, Walden, NY (US);
Rick Carter, Hopewell Junction, NY (US);
Michael P. Chudzik, Danbury, CT (US);
Rashmi Jha, Wappingers Falls, NY (US);
Naim Moumen, Walden, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Advanced Micro Devices, Inc., Sunnyvale, CA (US);
Abstract
A PFET having tailored dielectric constituted in part by an NFET threshold voltage (Vt) work function tuning layer in a gate stack thereof, related methods and integrated circuit are disclosed. In one embodiment, the PFET includes an n-type doped silicon well (N-well), a gate stack including: a doped band engineered PFET threshold voltage (Vt) work function tuning layer over the N-well; a tailored dielectric layer over the doped band engineered PFET Vt work function tuning layer, the tailored dielectric layer constituted by a high dielectric constant layer over the doped band engineered PFET Vt work function tuning layer and an n-type field effect transistor (NFET) threshold voltage (Vt) work function tuning layer over the high dielectric constant layer; and a metal over the NFET Vt work function tuning layer.