The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 08, 2011
Filed:
Apr. 02, 2008
Kaushik Chanda, Fishkill, NY (US);
Hazara S. Rathore, Stormville, NY (US);
Paul S. Mclaughlin, Poughkeepsie, NY (US);
Robert D. Edwards, Marlboro, NY (US);
Lawrence A. Clevenger, LaGrangeville, NY (US);
Andrew P. Cowley, Wappingers Falls, NY (US);
Chih-chao Yang, Glenmont, NY (US);
Conrad A. Barile, Wappingers Falls, NY (US);
Kaushik Chanda, Fishkill, NY (US);
Hazara S. Rathore, Stormville, NY (US);
Paul S. McLaughlin, Poughkeepsie, NY (US);
Robert D. Edwards, Marlboro, NY (US);
Lawrence A. Clevenger, LaGrangeville, NY (US);
Andrew P. Cowley, Wappingers Falls, NY (US);
Chih-Chao Yang, Glenmont, NY (US);
Conrad A. Barile, Wappingers Falls, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
The invention predicts premature dielectric breakdown in a semiconductor. At least one dielectric breakdown mode is calculated for a layer within chips comprising a semiconductor wafer lot. If only one mode is calculated, that is the best calculated mode. If multiple modes can be calculated, a best mode that most accurately represents dielectric breakdown for the semiconductor wafer lot is determined. Premature dielectric breakdown will be associated with any semiconductor with a breakdown voltage less than a predetermined standard deviation from the best calculated mode.