The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 01, 2011
Filed:
Mar. 22, 2011
Jae-sung Roh, Ichon-shi, KR;
Kee-jeung Lee, Ichon-shi, KR;
Han-sang Song, Ichon-shi, KR;
Seung-jin Yeom, Ichon-shi, KR;
Deok-sin Kil, Ichon-shi, KR;
Young-dae Kim, Ichon-shi, KR;
Jin-hyock Kim, Ichon-shi, KR;
Jae-Sung Roh, Ichon-shi, KR;
Kee-Jeung Lee, Ichon-shi, KR;
Han-Sang Song, Ichon-shi, KR;
Seung-Jin Yeom, Ichon-shi, KR;
Deok-Sin Kil, Ichon-shi, KR;
Young-Dae Kim, Ichon-shi, KR;
Jin-Hyock Kim, Ichon-shi, KR;
Hynix Semiconductor Inc., Icheon-si, KR;
Abstract
A method for fabricating a capacitor includes forming an isolation layer over a cell region and a peripheral region of a substrate. The isolation layer forms a plurality of open regions in the cell region. Storage nodes are formed on surfaces of the open regions. A sacrificial pattern is formed over the isolation layer and covers the cell region. The isolation layer is etched in the peripheral region to expose side portions of the resulting structure obtained after forming the sacrificial pattern in the cell region. With the sacrificial pattern supporting the storage nodes, the isolation layer in the cell region is removed. The sacrificial pattern is then removed.