The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 25, 2011
Filed:
May. 31, 2007
Dong Ha Jung, Kyoungki-do, KR;
Baek Mann Kim, Kyoungki-do, KR;
Soo Hyun Kim, Seoul, KR;
Young Jin Lee, Kyoungki-do, KR;
Sun Woo Hwang, Kyoungki-do, KR;
Jeong Tae Kim, Kyoungki-do, KR;
Dong Ha Jung, Kyoungki-do, KR;
Baek Mann Kim, Kyoungki-do, KR;
Soo Hyun Kim, Seoul, KR;
Young Jin Lee, Kyoungki-do, KR;
Sun Woo Hwang, Kyoungki-do, KR;
Jeong Tae Kim, Kyoungki-do, KR;
Hynix Semiconductor Inc., Kyoungki-do, KR;
Abstract
A metal wiring of a semiconductor device includes a semiconductor substrate; an insulating layer provided with a damascene pattern formed over the semiconductor substrate; a diffusion barrier layer which contains a RuOlayer formed on a surface of the damascene pattern and an Al deposit-inhibiting layer formed on a portion of the RuOlayer in both-side upper portion of the damascene pattern; and a wiring metal layer including Al formed on the diffusion barrier layer by MOCVD method in order to fill the damascene pattern.