The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 25, 2011
Filed:
May. 15, 2009
Toshiharu Miwa, Yokohama, JP;
Junko Konishi, Yokohama, JP;
Toshihide Kawachi, Hitachinaka, JP;
Shigenori Yamashita, Itami, JP;
Takeshi Tashiro, Hitachinaka, JP;
Hidekimi Fudo, Hitachinaka, JP;
Toshiharu Miwa, Yokohama, JP;
Junko Konishi, Yokohama, JP;
Toshihide Kawachi, Hitachinaka, JP;
Shigenori Yamashita, Itami, JP;
Takeshi Tashiro, Hitachinaka, JP;
Hidekimi Fudo, Hitachinaka, JP;
Renesas Electronics Corporation, Kanagawa, JP;
Abstract
In an exposure process forming a predetermined circuit pattern of a semiconductor device on a wafer, a resist dimension of the resist pattern formed on a wafer and a focus position in the exposure process at a past time are measured. A resist dimension and a focus position of a wafer to which the exposure process is secondly performed are estimated by using measurement results of the measured resist dimension and focus position, and a focus offset value is calculated by using estimated values of the estimated resist dimension and focus position. Then, an exposure dose is calculated with considering this focus offset value, and a resist pattern is formed on the wafer to which the exposure process is performed by using the calculated exposure dose and focus offset value.