The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 18, 2011
Filed:
Dec. 29, 2006
David A. Konfaty, Portland, OR (US);
John I. Garney, Portland, OR (US);
Ulhas Warrier, Beaverton, OR (US);
Kiran S. Panesar, Bangalore, IN;
David A. Konfaty, Portland, OR (US);
John I. Garney, Portland, OR (US);
Ulhas Warrier, Beaverton, OR (US);
Kiran S. Panesar, Bangalore, IN;
Intel Corporation, Santa Clara, CA (US);
Abstract
Embodiments of apparatuses, methods, and systems for partitioning memory mapped device configuration space are disclosed. In one embodiment, an apparatus includes a configuration space address storage location, an access map storage location, and addressing logic. The configuration space address storage location is to store a pointer to a memory region to which transactions to configure devices in a partition of a partitioned system are addressed. The access map storage location is to store an access map or a pointer to an access map. The addressing logic is to use the access map to determine whether a configuration transaction from a processor to one of the devices is to be allowed.