The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 18, 2011

Filed:

Dec. 13, 2006
Applicants:

Eiichi Yamazaki, Fukushima, JP;

Takashi Sekine, Fukushima, JP;

Inventors:

Eiichi Yamazaki, Fukushima, JP;

Takashi Sekine, Fukushima, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
B24B 1/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

According to the present invention, in a method for subjecting a roughly ground chamfer portion of a semiconductor wafer to helical grinding by relatively inclining the wafer and a second grinding stone to perform precise grinding, an edge portion of a discoid truer is formed into a vertically asymmetrical groove shape of a first grinding stone by using the first grinding stone having a vertically asymmetrical groove formed on a periphery thereof to grind the edge portion of the truer by the groove of the first grinding stone without being relatively inclined, a groove is formed on a periphery of the second grinding stone by relatively inclining the truer and the second grinding stone to subject the second grinding stone to helical grinding, and the chamfer portion of the wafer is precisely ground based on helical grinding by relatively inclining the semiconductor wafer with respect to a direction of the groove formed on the periphery of the second grinding stone. As a result, there is provided the method for machining a chamfer portion of the semiconductor wafer, which can machine the chamfer portion of the wafer into a vertically symmetrical shape when subjecting the chamfer portion of the semiconductor wafer to helical grinding, e.g. a resin grinding stone and the like.


Find Patent Forward Citations

Yamazaki, Eiichi. (2011). Method for machining chamfer portion of semiconductor wafer and method for correcting groove shape of grinding stone (U.S. Patent No. 8038511). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8038511

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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