The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 11, 2011

Filed:

Sep. 25, 2009
Applicants:

Rahul Shringarpure, Calabasas, CA (US);

Cynthia D. Baringer, Malibu, CA (US);

Inventors:

Rahul Shringarpure, Calabasas, CA (US);

Cynthia D. Baringer, Malibu, CA (US);

Assignee:

The Boeing Company, Chicago, IL (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03L 7/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

Circuits, demultiplexers, and methods are disclosed. A circuit includes a reference clock input to receive clock pulses at a reference clock speed. An internal divided clock input receives a divided clock signal from a clock divider that is driven by the clock pulses. The clock divider generates the divided clock signal at a second clock speed that is a fraction of the reference clock speed. An external divided clock input receives an external divided clock signal. The external divided clock signal is driven by the clock pulses and operates at the second clock speed. A clock transition synchronization circuit suppresses application of one or more of the clock pulses to the clock divider when the divided clock signal transitions between clock states out of synchronization with the external divided clock signal.


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