The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 20, 2011

Filed:

Oct. 26, 2010
Applicants:

Wagdi W. Abadeer, Essex Junction, VT (US);

Lilian Kamal, Legal Representative, Saratoga, CA (US);

John J. Ellis-monaghan, Grand Isle, VT (US);

Jeffrey P. Gambino, Westford, VT (US);

Tom C. Lee, Essex Junction, VT (US);

Inventors:

Wagdi W. Abadeer, Essex Junction, VT (US);

Lilian Kamal, legal representative, Saratoga, CA (US);

John J. Ellis-Monaghan, Grand Isle, VT (US);

Jeffrey P. Gambino, Westford, VT (US);

Tom C. Lee, Essex Junction, VT (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01);
U.S. Cl.
CPC ...
Abstract

Disclosed are embodiments of a semiconductor wafer processing method that allow device regions to be selectively annealed following back end of the line (BEOL) metal wiring formation without degrading wiring layer reliability. In the embodiments, a semiconductor device is formed adjacent to the top surface of a wafer such that it incorporates a selectively placed infrared absorbing layer (IAL). Then, following BEOL metal wiring formation, the bottom surface of the wafer is exposed to an infrared light having a wavelength that is transparent to the wafer. The infrared light is absorbed by and, thereby heats up the IAL to a first predetermined temperature (e.g., a dopant activation temperature, a temperature required for a state change, etc.). The resulting heat is transferred from the IAL to an adjacent region of the semiconductor device without raising the temperature of the metal wiring above a second predetermined temperature (e.g., a temperature that could degrade the metal wiring) that is lower than the first predetermined temperature.


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