The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 13, 2011

Filed:

Mar. 29, 2007
Applicants:

Thierry Masson, Varces, FR;

Pierre-adrien Pinoncely, Grenoble, FR;

Laurent Espuno, St Nizier du Moucherotte, FR;

Sébastien Lebreton, Fontanil Cornillon, FR;

Michel Durr, La Buisse, FR;

Inventors:

Thierry Masson, Varces, FR;

Pierre-Adrien Pinoncely, Grenoble, FR;

Laurent Espuno, St Nizier du Moucherotte, FR;

Sébastien Lebreton, Fontanil Cornillon, FR;

Michel Durr, La Buisse, FR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02J 7/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

The invention relates to circuits for managing differential voltages in series. To individually control the differential voltages of voltage sources in series, there is provided an integrated control circuit for a set of N sources in series. This circuit comprises N discharge control and measurement cells which are each produced in a separate well, insulated from the substrate and from the other wells. The cells are linked to the circuits formed in the substrate by level translation circuits having a part inside the well and a part outside the well. These circuits use transistors withstanding voltages of several tens of volts. The integrated circuits may be cascaded on an SPI bus if one wishes to control a group of k.N sources with k>1.


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