The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 13, 2011
Filed:
Mar. 17, 2010
Yoshio Ozawa, Yokohama, JP;
Ichiro Mizushima, Yokohama, JP;
Takashi Nakao, Yokohama, JP;
Akihito Yamamoto, Naka-gun, JP;
Takashi Suzuki, Yokohama, JP;
Masahiro Kiyotoshi, Sagamihara, JP;
Yoshio Ozawa, Yokohama, JP;
Ichiro Mizushima, Yokohama, JP;
Takashi Nakao, Yokohama, JP;
Akihito Yamamoto, Naka-gun, JP;
Takashi Suzuki, Yokohama, JP;
Masahiro Kiyotoshi, Sagamihara, JP;
Kabushiki Kaisha Toshiba, Tokyo, JP;
Abstract
A nonvolatile semiconductor memory device including a semiconductor substrate having a semiconductor layer and an insulating material provided on a surface thereof, a surface of the insulating material is covered with the semiconductor layer, and a plurality of memory cells provided on the semiconductor layer, the memory cells includes a first dielectric film provided by covering the surface of the semiconductor layer, a plurality of charge storage layers provided above the insulating material and on the first dielectric film, a plurality of second dielectric films provided on the each charge storage layer, a plurality of conductive layers provided on the each second dielectric film, and an impurity diffusion layer formed partially or overall at least above the insulating material and inside the semiconductor layer and at least a portion of a bottom end thereof being provided by an upper surface of the insulating material.