The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 06, 2011

Filed:

Apr. 22, 2009
Applicants:

Hongyu Yu, Singapore, SG;

Shou-zen Chang, Hsinchu Country, TW;

Thomas Y. Hoffmann, Leuven, BE;

Philippe Absil, Loupoigne, BE;

Inventors:

HongYu Yu, Singapore, SG;

Shou-Zen Chang, Hsinchu Country, TW;

Thomas Y. Hoffmann, Leuven, BE;

Philippe Absil, Loupoigne, BE;

Assignee:

IMEC, Leuven, BE;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/092 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for manufacturing a dual workfunction semiconductor device and the device made thereof are disclosed. In one aspect, the method includes manufacturing a first transistor in a first region and a second transistor in a second region of a substrate, the first transistor including a first gate stack, the first gate stack having a first gate dielectric capping layer and a first metal gate electrode layer. The second gate stack is similar to the first gate stack. The method includes applying a first thermal budget to the first gate dielectric capping layer and a second thermal budget to the second gate dielectric capping material to tune the workfunction of the first and second gate stack, the first thermal budget being smaller than the second thermal budget such that after the thermal treatment the first and the second gate stack have different work functions.


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