The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 30, 2011

Filed:

Nov. 25, 2008
Applicants:

Chien-hsien Song, Kaohsiung, TW;

Yung-lung Chou, Hsinchu, TW;

Yu-hsun Chen, Changhua County, TW;

Cheng-che Tsai, Hsinchu, TW;

Inventors:

Chien-Hsien Song, Kaohsiung, TW;

Yung-Lung Chou, Hsinchu, TW;

Yu-Hsun Chen, Changhua County, TW;

Cheng-Che Tsai, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/302 (2006.01);
U.S. Cl.
CPC ...
Abstract

Fabrication methods for integrating CMOS and BJT devices are presented. A semiconductor substrate having a first region and a second region are provided, wherein the first region includes a CMOS device, and the second region includes a BJT device. A dielectric layer is conformably deposited on the semiconductor substrate. Part of the dielectric layer is removed, thereby forming sidewall spacers on a gate structure of the CMOS device and remaining a thin dielectric layer on the BJT device. The remaining thin dielectric layer is completely removed, completing integration of the CMOS device and the BJT device.


Find Patent Forward Citations

Song, Chien-Hsien. (2011). Fabrication methods for integration cmos and bjt devices (U.S. Patent No. 8008212). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8008212

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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