The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 23, 2011
Filed:
Jan. 12, 2009
Samuel I. Ward, Round Rock, TX (US);
Patrick R. Crosby, Austin, TX (US);
William D. Ramsour, Pflugerville, TX (US);
Bao G. Truong, Austin, TX (US);
Samuel I. Ward, Round Rock, TX (US);
Patrick R. Crosby, Austin, TX (US);
William D. Ramsour, Pflugerville, TX (US);
Bao G. Truong, Austin, TX (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A method comprises generating a test pattern for a device under test (DUT), wherein the DUT comprises a plurality of scan chains coupled to a plurality of multiple input shift registers (MISRs). The plurality of faults detected by a first MISR and by a second MISR are identified. In the event the plurality of faults detected by the first MISR does not include any of the plurality of faults detected by the second MISR and the plurality of faults detected by the second MISR does not include any of the plurality of faults detected by the first MISR, the first MISR and the second MISR are coupled as an independent MISR pair. The test pattern is applied to the DUT to generate a scan chain output. The independent MISR pair captures the scan chain output to generate a test signature. The test signature is compared with a known good signature.