The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 23, 2011
Filed:
May. 08, 2009
Jayabrata Ghosh Dastidar, Santa Clara, CA (US);
Danh Dang, Hayward, CA (US);
Jayabrata Ghosh Dastidar, Santa Clara, CA (US);
Danh Dang, Hayward, CA (US);
Altera Corporation, San Jose, CA (US);
Abstract
An integrated circuit is provided with built-in-self test circuitry. The integrated circuit may have multiple blocks of memory. The memory may be tested using the built-in-self test circuitry. Each memory block may include a satellite address generator that is used in generating test addresses for the memory blocks. Each memory block may also include failure analysis logic and output response analyzer logic. Stalling logic may be used to individually stall memory block testing on a block-by-block basis during memory tests. Address buffer circuitry such as first-in-first-out buffers may be used to provide randomized memory addresses during testing.