The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 23, 2011

Filed:

Apr. 02, 2008
Applicants:

Seung-yeol Yang, Hwaseong-si, KR;

Sang-wook Park, Cheonan-si, KR;

Seung-jae Lee, Cheonan-si, KR;

Min-young Son, Asan-si, KR;

Inventors:

Seung-yeol Yang, Hwaseong-si, KR;

Sang-wook Park, Cheonan-si, KR;

Seung-jae Lee, Cheonan-si, KR;

Min-young Son, Asan-si, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/498 (2006.01); H01L 21/60 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor package includes one or more semiconductor chips to form a semiconductor package. The semiconductor package may include a first semiconductor chip package having a first substrate including a first surface having a center portion on which a first semiconductor chip is mounted, at least one first boundary portion on which a plurality of conductive connection pad groups are formed, and/or a molding member including a body that covers the first semiconductor chip and at least one extension that extends from the body. The extension extends while avoiding the conductive connection pad group. The semiconductor package may further include a second semiconductor chip package stacked on the first semiconductor chip package and including a second substrate on which at least one second semiconductor chip that is electrically connected to the conductive connection pad group may be mounted.


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