The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 09, 2011

Filed:

Dec. 15, 2009
Applicants:

Fumiyuki Osanai, Tokyo, JP;

Hiroki Fujisawa, Tokyo, JP;

Inventors:

Fumiyuki Osanai, Tokyo, JP;

Hiroki Fujisawa, Tokyo, JP;

Assignee:

Elpida Memory, Inc., Chuo-ku, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 17/16 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor device adjusting an impedance level of an output buffer, includes a replica buffer circuit including a circuit configuration substantially identical to the output buffer, a counter circuit changing an impedance code to vary an impedance level of the replica buffer, a latch circuit temporarily holding the impedance code in response to a control signal, and an end-determining circuit producing the control signal in response to a lapse of a predetermined period from issuance of a calibration command, irrespective of a fact that the replica buffer has not yet reached a desirable impedance level.


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