The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 02, 2011

Filed:

Apr. 02, 2008
Applicants:

Yutaka Uematsu, Hachioji, JP;

Hideki Osaka, Kokubunji, JP;

Yoji Nishio, Tokyo, JP;

Eiichi Suzuki, Tokyo, JP;

Inventors:

Yutaka Uematsu, Hachioji, JP;

Hideki Osaka, Kokubunji, JP;

Yoji Nishio, Tokyo, JP;

Eiichi Suzuki, Tokyo, JP;

Assignees:

Hitachi, Ltd., Tokyo, JP;

Elpida Memory, Inc., Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04B 3/28 (2006.01);
U.S. Cl.
CPC ...
Abstract

A technique capable of achieving both improvement of mounting density and noise reduction for a semiconductor device is provided. An LSI mounted on a printed wiring board comprises a grounding BGA ball and a power BGA ball to get power supply from the printed wiring board, and the grounding BGA ball and the power BGA ball are arranged closely to each other. A decoupling capacitor is mounted on the printed wiring board and has a first terminal and a second terminal. The grounding BGA ball and the first terminal are connected by a first metal electrode plate, and the power BGA ball and the second terminal are connected by a second metal electrode plate. The first metal electrode plate and the second metal electrode plate interpose a dielectric film having a thickness equal to or smaller than 1 μm therebetween.


Find Patent Forward Citations

Loading…