The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 02, 2011

Filed:

Mar. 30, 2005
Applicants:

Chang-woo OH, Gyeonggi-do, KR;

Dong-gun Park, Gyeonggi-do, KR;

Dong-won Kim, Gyeonggi-do, KR;

Ming LI, Gyeonggi-do, KR;

Sung-hwan Kim, Gyeonggi-do, KR;

Inventors:

Chang-woo Oh, Gyeonggi-do, KR;

Dong-gun Park, Gyeonggi-do, KR;

Dong-won Kim, Gyeonggi-do, KR;

Ming Li, Gyeonggi-do, KR;

Sung-hwan Kim, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/76 (2006.01);
U.S. Cl.
CPC ...
Abstract

Semiconductor devices include a semiconductor substrate with a stack structure protruding from the semiconductor substrate and surrounded by an isolation structure. The stack structure includes an active layer pattern and a gap-filling insulation layer between the semiconductor substrate and the active layer pattern. A gate electrode extends from the isolation structure around the stack structure. The gate electrode is configured to provide a support structure for the active layer pattern. The gate electrode may be a gate electrode of a silicon on insulator (SOI) device formed on the semiconductor wafer and the semiconductor device may further include a bulk silicon device formed on the semiconductor substrate in a region of the semiconductor substrate not including the gap-filing insulation layer.


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