The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 02, 2011

Filed:

Apr. 07, 2005
Applicants:

Ralf Lerner, Erfurt, DE;

Uwe Eckoldt, Hohenfelden, DE;

Thomas Oetzel, Iserlohn, DE;

Inventors:

Ralf Lerner, Erfurt, DE;

Uwe Eckoldt, Hohenfelden, DE;

Thomas Oetzel, Iserlohn, DE;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/12 (2006.01);
U.S. Cl.
CPC ...
Abstract

The aim of the invention is to integrate low-voltage logic elements and high-voltage power elements in one and the same silicon circuit. Said aim is achieved by dielectrically chip regions having different potentials from each other with the aid of isolation trenches (). In order to prevent voltage rises at sharp edges on the bottom of the isolation trenches, said edges are rounded in a simple process, part of the insulating layer () being isotropically etched.


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