The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 12, 2011

Filed:

Mar. 03, 2008
Applicants:

Paul R. Schumacher, Berthoud, CO (US);

Ian D. Miller, Charlotte, NC (US);

David B. Parlour, Fox Chapel, PA (US);

Jorn W. Janneck, San Jose, CA (US);

Pradip Kumar Jha, Cupertino, CA (US);

Inventors:

Paul R. Schumacher, Berthoud, CO (US);

Ian D. Miller, Charlotte, NC (US);

David B. Parlour, Fox Chapel, PA (US);

Jorn W. Janneck, San Jose, CA (US);

Pradip Kumar Jha, Cupertino, CA (US);

Assignee:

Xilinx, Inc., San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of estimating resource requirements for a circuit design is disclosed. The method comprises identifying intermediate circuit modules of a netlist associated with the circuit design; accessing a library of resource requirements for intermediate circuit modules of netlists for circuit designs; selecting intermediate circuit modules of the library according to predetermined parameters for the circuit design; and generating an estimate of resource requirements for the circuit design based upon resource requirements of the selected intermediate circuit modules.


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