The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 05, 2011

Filed:

Jun. 29, 2010
Applicants:

Fayez E. Abboud, Pleasanton, CA (US);

Sriram Krishnaswami, Saratoga, CA (US);

Benjamin M. Johnston, Los Gatos, CA (US);

Hung T. Nguyen, Fremont, CA (US);

Matthias Brunner, Kirchheim, DE;

Ralf Schmid, Poing, DE;

John M. White, Hayward, CA (US);

Shinichi Kurita, San Jose, CA (US);

James C. Hunter, Los Gatos, CA (US);

Inventors:

Fayez E. Abboud, Pleasanton, CA (US);

Sriram Krishnaswami, Saratoga, CA (US);

Benjamin M. Johnston, Los Gatos, CA (US);

Hung T. Nguyen, Fremont, CA (US);

Matthias Brunner, Kirchheim, DE;

Ralf Schmid, Poing, DE;

John M. White, Hayward, CA (US);

Shinichi Kurita, San Jose, CA (US);

James C. Hunter, Los Gatos, CA (US);

Assignee:

Applied Materials, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/302 (2006.01); G01R 31/305 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for testing a plurality of electronic devices formed on a large area substrate is described. In one embodiment, the method includes transferring a substrate on an end effector relative to a testing platform having a plurality of testing columns coupled thereto, the substrate having a plurality of electronic devices located thereon, and moving the substrate in a single directional axis relative to an optical axis of each of the plurality of testing columns, the single directional axis being substantially orthogonal to the optical axis to define a test area on the substrate, wherein the test area is configured to cover an entire length or an entire width of the substrate such that the testing columns are capable of testing the entire substrate as the substrate is moved through the test area.


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