The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 28, 2011
Filed:
Sep. 21, 2009
Michel J. Abou-khalil, Essex Junction, VT (US);
Robert Gauthier, Essex Junction, VT (US);
Junjun LI, Essex Junction, VT (US);
Michel J. Abou-Khalil, Essex Junction, VT (US);
Robert Gauthier, Essex Junction, VT (US);
Junjun Li, Essex Junction, VT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
Semiconductor structures providing protection against electrostatic events of both polarities are provided. A pair of p-n junctions is provided underneath a shallow trench isolation portion between a first-conductivity-type well and each of a signal-side second-conductivity-type well and an electrical-ground-side second-conductivity-type well in a semiconductor substrate. A second-conductivity-type doped region and a first-conductivity-type doped region are formed above each second-conductivity-type well such that a portion of the second-conductivity-type well resistively separates the second-conductivity-type doped region and the first-conductivity-type doped region within the semiconductor substrate. Each of the second-conductivity-type doped regions is wired either to a signal node or electrical ground. One of the two npn transistors and one of the two p-n diodes, each inherently present in the semiconductor structure, turn on to provide protection against electrical discharge events involving either type of excessive electrical charges.