The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 21, 2011

Filed:

Feb. 08, 2007
Applicants:

Pierguido Garofalo, San Donato Milanese, IT;

Efrem Bolandrina, Fiorano al Serio, IT;

Claudio Nava, Cornate d'Adda, IT;

Inventors:

Pierguido Garofalo, San Donato Milanese, IT;

Efrem Bolandrina, Fiorano al Serio, IT;

Claudio Nava, Cornate d'Adda, IT;

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/08 (2006.01);
U.S. Cl.
CPC ...
Abstract

A memory device having a plurality of memory cells grouped in at least two memory sectors is disclosed. A first decoding circuit operable to receive address codes of the plurality of memory cells and to generate a plurality of decoding and selecting signals in response to the address codes. A plurality of second decoding circuits are coupled to the first decoding circuit and operable to generate driving signals for the memory cell address signal lines based at least in part on the plurality of decoding and selecting signals. A voltage shifting circuit is operable to generate a shift in the voltage of the plurality of decoding and selecting signals for generating a plurality of shifted voltage decoding and selecting signals and to provide the shifted decoding and selecting signals to the plurality of second decoding signals for generating the drive signals.


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