The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 14, 2011

Filed:

May. 31, 2007
Applicants:

Brian A. Winstead, Austin, TX (US);

Konstantin V. Loiko, Austin, TX (US);

Voon-yew Thean, Fishkill, NY (US);

Inventors:

Brian A. Winstead, Austin, TX (US);

Konstantin V. Loiko, Austin, TX (US);

Voon-Yew Thean, Fishkill, NY (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/76 (2006.01); H01L 21/3205 (2006.01); H01L 21/4763 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor device () is formed in a semiconductor layer (). A gate stack () is formed over the semiconductor layer and comprises a first conductive layer () and a second layer () over the first layer. The first layer is more conductive and provides more stopping power to an implant than the second layer. A species () is implanted into the second layer. Source/drain regions () are formed in the semiconductor layer on opposing sides of the gate stack. The gate stack is heated after the step of implanting to cause the gate stack to exert stress in the semiconductor layer in a region under the gate stack.


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