The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 07, 2011
Filed:
Jul. 23, 2008
Hiroyuki Momono, Tokyo, JP;
Hiroshi Mitsuyama, Tokyo, JP;
Katsuhiro Hasegawa, Itami, JP;
Keiko Nishitsuji, Itami, JP;
Kazunobu Miki, Tokyo, JP;
Hiroyuki Momono, Tokyo, JP;
Hiroshi Mitsuyama, Tokyo, JP;
Katsuhiro Hasegawa, Itami, JP;
Keiko Nishitsuji, Itami, JP;
Kazunobu Miki, Tokyo, JP;
Renesas Electronics Corporation, Kanagawa, JP;
Abstract
Method of manufacturing semiconductor device including forming inter-layer insulating film on semiconductor substrate. First metal film is formed on inter-layer insulating film. First resist is formed on first metal film and patterned. Anisotropic etching performed on first metal film using first resist as mask. First resist is removed and second metal film is formed on inter-layer insulating film to cover remaining first metal film. Second resist is formed on second metal film in area where first metal film exists on inter-layer insulating film and part of area where first metal film does not exist. Anisotropic etching is performed on second metal film using second resist as mask and bonding pad having first metal film and second metal film, and upper layer wiring having second metal film and not first metal film. Second resist is removed. Surface protection film covering bonding pad is formed. Pad opening is formed on bonding pad.