The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 31, 2011

Filed:

Dec. 31, 2007
Applicants:

Nicholas D. Triantafillou, Portland, OR (US);

Malay Trivedi, Chandler, AZ (US);

Erik A. Mcshane, Phoenix, AZ (US);

James T. Doyle, Prescott, AZ (US);

Mark J. Kachmarek, Hillsboro, OR (US);

Inventors:

Nicholas D. Triantafillou, Portland, OR (US);

Malay Trivedi, Chandler, AZ (US);

Erik A. McShane, Phoenix, AZ (US);

James T. Doyle, Prescott, AZ (US);

Mark J. Kachmarek, Hillsboro, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/70 (2006.01);
U.S. Cl.
CPC ...
Abstract

Inductors packaged with a voltage regulator for an integrated circuit within the same package are deposited to a sufficient thickness to reduce resistance and improve the quality factor. Furthermore, the voltage regulator switches currents through the inductors at a relatively high frequency such that the overall size and inductances of the inductors may be reduced. As a consequence, integrating both the integrated circuits including a voltage regulator and associated inductor array in a single package is facilitated. Other embodiments are described and claimed.


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