The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 17, 2011
Filed:
Mar. 30, 2007
Alok Kumar, Santa Clara, CA (US);
Minal B. Patel, Long Beach, NY (US);
Kuo-lang Tseng, Cupertino, CA (US);
Ramesh M. Thomas, Saratoga, CA (US);
Madhukar Tallam, Fremont, CA (US);
Aneet Chopra, San Jose, CA (US);
Ned M. Smith, Beaverton, OR (US);
David W. Grawrock, Aloha, OR (US);
David Champagne, Princeton, NJ (US);
Alok Kumar, Santa Clara, CA (US);
Minal B. Patel, Long Beach, NY (US);
Kuo-Lang Tseng, Cupertino, CA (US);
Ramesh M. Thomas, Saratoga, CA (US);
Madhukar Tallam, Fremont, CA (US);
Aneet Chopra, San Jose, CA (US);
Ned M. Smith, Beaverton, OR (US);
David W. Grawrock, Aloha, OR (US);
David Champagne, Princeton, NJ (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A processing system features random access memory (RAM), a processor, and a trusted platform module (TPM). When the processing system enters a sleep mode during which the RAM is to stay powered, the processing system may measuring a VMM and one or more secure VMs in the processing system. However, the processing system may not measure or encrypt all of system memory. Upon resuming from sleep, the processing system may verify the measurements, to ensure that the VMM and secure VMs have not been tampered with. Other steps may include sealing encryption keys to the TPM, while preserving the blobs in memory. Other embodiments are described and claimed.