The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 10, 2011

Filed:

Jul. 27, 2007
Applicants:

Yun-hee Shin, Gyeonggi-do, KR;

Han-gu Sohn, Gyeonggi-do, KR;

Young-min Lee, Gyeonggi-do, KR;

Dong-hyuk Lee, Seoul, KR;

Jong-wook Park, Gyeonggi-do, KR;

Ho-cheol Lee, Gyeonggi-do, KR;

Mi-jo Kim, Gyeonggi-do, KR;

Jung-sik Kim, Gyeonggi-do, KR;

Chang-ho Lee, Gyeonggi-do, KR;

Inventors:

Yun-Hee Shin, Gyeonggi-do, KR;

Han-Gu Sohn, Gyeonggi-do, KR;

Young-Min Lee, Gyeonggi-do, KR;

Dong-Hyuk Lee, Seoul, KR;

Jong-Wook Park, Gyeonggi-do, KR;

Ho-Cheol Lee, Gyeonggi-do, KR;

Mi-Jo Kim, Gyeonggi-do, KR;

Jung-Sik Kim, Gyeonggi-do, KR;

Chang-Ho Lee, Gyeonggi-do, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A multipath accessible semiconductor memory device provides an interface function between processors. The memory device may include a memory cell array having a shared memory area operationally coupled to two or more ports that are independently accessible by two or more processors, an access path forming unit to form a data access path between one of the ports and the shared memory area in response to external signals applied by the processors, and an interface unit having a semaphore area and mailbox areas accessible in the shared memory area by the two or more processors to provide an interface function for communication between the two or more processors.


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