The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 10, 2011

Filed:

Feb. 06, 2009
Applicants:

Yoshiro Riho, Tokyo, JP;

Jun Suzuki, Tokyo, JP;

Yasuhiro Matsumoto, Tokyo, JP;

Shuichi Kubouchi, Tokyo, JP;

Hiromasa Noda, Tokyo, JP;

Yasuji Koshikawa, Tokyo, JP;

Inventors:

Yoshiro Riho, Tokyo, JP;

Jun Suzuki, Tokyo, JP;

Yasuhiro Matsumoto, Tokyo, JP;

Shuichi Kubouchi, Tokyo, JP;

Hiromasa Noda, Tokyo, JP;

Yasuji Koshikawa, Tokyo, JP;

Assignee:

Elpida Memory, Inc., Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

There are provided are a plurality of memory mats, a sub-word driver that accesses a normal memory cell irrespective of whether a row address to which access is requested is a defective address, a sub-word driver that accesses a redundant memory cell belonging to a memory mat different from the normal memory cell indicated by the row address, when the row address is a defective address. According to the present invention, the normal memory cell and a redundant memory cell belong to memory mats different to each other, and thus the normal memory cell can be accessed concurrently with determining operation of the repair determining circuit.


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