The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 10, 2011

Filed:

Nov. 22, 2005
Applicants:

Toshiyuki Takemori, Hanno, JP;

Yuji Watanabe, Hanno, JP;

Fuminori Sasaoka, Hanno, JP;

Kazushige Matsuyama, Hanno, JP;

Kunihito Oshima, Hanno, JP;

Masato Itoi, Hanno, JP;

Inventors:

Toshiyuki Takemori, Hanno, JP;

Yuji Watanabe, Hanno, JP;

Fuminori Sasaoka, Hanno, JP;

Kazushige Matsuyama, Hanno, JP;

Kunihito Oshima, Hanno, JP;

Masato Itoi, Hanno, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/76 (2006.01); H01L 29/94 (2006.01); H01L 31/062 (2006.01); H01L 31/113 (2006.01); H01L 31/119 (2006.01);
U.S. Cl.
CPC ...
Abstract

A trench gate power MOSFET () includes: an n-type epitaxial layer (); a p-type body region () formed in the vicinity of an upper surface of the n-type epitaxial layer (); a plurality of trenches () formed so as to reach the n-type epitaxial layer () from an upper surface of the p-type body region (); and gates () formed in the trenches (). In some regions facing the p-type body region () in the n-type epitaxial layer (), p-type carrier extracting regions () are formed. According to the trench gate power MOSFET (), holes generated in a cell region can be effectively collected through the p-type carrier extracting regions () so as to further increase a speed of the switching operation.


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