The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 03, 2011
Filed:
Oct. 06, 2005
Applicants:
Yuhao Luo, San Jose, CA (US);
Deepak Kumar Nayak, Fremont, CA (US);
Daniel Gitlin, Palo Alto, CA (US);
Inventors:
Yuhao Luo, San Jose, CA (US);
Deepak Kumar Nayak, Fremont, CA (US);
Daniel Gitlin, Palo Alto, CA (US);
Assignee:
Xilinx, Inc., San Jose, CA (US);
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
Abstract
An MOS device has an embedded dielectric structure underlying an active portion of the device, such as a source extension or a drain extension. In an alternative embodiment, an embedded dielectric structure underlies the channel region of a MOS device, as well as the source and drain extensions.