The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 03, 2011
Filed:
Dec. 07, 2006
Daniel J. Woodruff, Kalispell, MT (US);
Paul R. Mchugh, Kalispell, MT (US);
Gregory J. Wilson, Kalispell, MT (US);
Kyle M. Hanson, Kalispell, MT (US);
Nigel Stewart, Burwell, GB;
Erik Lund, Burien, WA (US);
Steven L. Peace, Whitefish, MT (US);
Daniel J. Woodruff, Kalispell, MT (US);
Paul R. McHugh, Kalispell, MT (US);
Gregory J. Wilson, Kalispell, MT (US);
Kyle M. Hanson, Kalispell, MT (US);
Nigel Stewart, Burwell, GB;
Erik Lund, Burien, WA (US);
Steven L. Peace, Whitefish, MT (US);
Semitool, Inc., Kalispell, MT (US);
Abstract
A processor for making porous silicon or processing other substrates has first and second chamber assemblies. The first and second chamber assemblies include first and second seals for sealing against a wafer, and first and second electrodes, respectively. The first and/or second seal is moveable towards and away from a wafer in the processor, to move between a wafer load/unload position, and a wafer process position. The first electrode may move along with the first seal, and the second electrode may move along with the second seal. A light source shines light onto the first side of the wafer. The processor may be pivotable from a substantially horizontal orientation, for loading and unloading a wafer, to a substantially vertical orientation, for processing a wafer.