The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 05, 2011
Filed:
Apr. 30, 2010
Bindiganavale S. Nataraj, Cupertino, CA (US);
Sandeep Khanna, Los Altos, CA (US);
Varadarajan Srinivasan, Los Altos Hills, CA (US);
Bindiganavale S. Nataraj, Cupertino, CA (US);
Sandeep Khanna, Los Altos, CA (US);
Varadarajan Srinivasan, Los Altos Hills, CA (US);
NetLogic Microsystems, Inc., Santa Clara, CA (US);
Abstract
A memory device operates in a calibration mode during which the effects of bit line leakage current are measured and to operate in a normal mode during which the bit line current is adjusted to compensate for leakage according to the results of the calibration mode. In the calibration mode, a leakage-free sense operation is performed to determine the differential voltage generated on the bit lines in response to a data value. Then, a leakage-susceptible test read operation is performed to determine the differential voltage generated on the bit lines in response to the data value. A detection circuit measures the difference between the differential voltages generated in the leakage-free and leakage-susceptible test read operations to generate a compensation signal, which subsequently adjusts the bit line compensation current during the normal mode.