The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 05, 2011

Filed:

May. 25, 2007
Applicants:

Yuri Mirgorodski, Sunnyvale, CA (US);

Natalia Lavrovskaya, Sunnyvale, CA (US);

Saurabh Desai, Fremont, CA (US);

Inventors:

Yuri Mirgorodski, Sunnyvale, CA (US);

Natalia Lavrovskaya, Sunnyvale, CA (US);

Saurabh Desai, Fremont, CA (US);

Assignee:

National Semiconductor Corporation, Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/76 (2006.01);
U.S. Cl.
CPC ...
Abstract

In a non-volatile memory cell, a single poly SOI technology is used to save space and achieve low current programming by providing two capacitors formed in an n-material over an NBL, forming a inverter in an n-material over a PBL, and isolating the NBL from the PBL by means of a lightly doped region or a deep trench isolation region.


Find Patent Forward Citations

Quick Actions:

Mirgorodski, Yuri. (2011). Non-volatile memory cell with two capacitors and one pnp transistor and a method of forming such a cell in a 1-poly soi technology (U.S. Patent No. 7919805). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7919805

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…