The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 29, 2011

Filed:

May. 01, 2008
Applicants:

Tang-kuei Tseng, Jhudong Township, Hsinchu County, TW;

Che-hao Chuang, Hsinchu, TW;

Ryan Hsin-chin Jiang, Taipei, TW;

Ming-dou Ker, Jhu-bei, TW;

Inventors:

Tang-Kuei Tseng, Jhudong Township, Hsinchu County, TW;

Che-Hao Chuang, Hsinchu, TW;

Ryan Hsin-Chin Jiang, Taipei, TW;

Ming-Dou Ker, Jhu-bei, TW;

Assignee:

Amazing Microelectronic Corp., Taipei County, TW;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present invention discloses a symmetric bidirectional silicon-controlled rectifier, which comprises: a substrate; a buried layer formed on the substrate; a first well, a middle region and a second well, which are sequentially formed on the buried layer side-by-side; a first semiconductor area and a second semiconductor area both formed inside the first well; a third semiconductor area formed in a junction between the first well and the middle region, wherein a first gate is formed over a region between the second and third semiconductor areas; a fourth semiconductor area and a fifth semiconductor area both formed inside the second well; a sixth semiconductor area formed in a junction between the second well and the middle region, wherein a second gate is formed over a region between the fifth and sixth semiconductor areas.


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