The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 22, 2011
Filed:
Jan. 27, 2009
Derick Gardner Behrends, Rochester, MN (US);
Travis Reynold Hebig, Rochester, MN (US);
Daniel Mark Nelson, Rochester, MN (US);
Jesse Daniel Smith, Rochester, MN (US);
Derick Gardner Behrends, Rochester, MN (US);
Travis Reynold Hebig, Rochester, MN (US);
Daniel Mark Nelson, Rochester, MN (US);
Jesse Daniel Smith, Rochester, MN (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
An array built in self test (ABIST) method and circuit for implementing enhanced static random access memory (SRAM) stability and enhanced chip yield using configurable wordline voltage levels, and a design structure on which the subject circuit resides are provided. A wordline is connected to a SRAM memory cell. A plurality of wordline voltage pulldown devices is connected to the wordline. A respective wordline voltage control input signal is applied to each of the plurality of wordline voltage pulldown devices to selectively adjust the voltage level of the wordline.