Phase locked loop circuit that locks the oscillation frequency to a target frequency

Abstract

In a PLL circuit, an oscillation frequency is quickly and accurately locked to a target frequency. There is provided a PLL circuit, including a VCO that controls the frequency of an output signal according to a voltage of an input signal, a loop divider that divides the frequency of a signal, which is acquired by causing a mixer to mix a local signal generated by a local oscillator and the output signal with each other, by N, and a reference frequency divider that divides the frequency of a reference signal, which is output by a reference signal oscillator, by R. Also provided is a phase comparator that outputs a signal according to a difference in phase between an output of the loop divider and an output of the reference frequency divider, a loop filter that passes low frequency components, and supplies the VCO with the low frequency components, a subtractor that outputs a difference between a voltage of the input signal to be supplied to the VCO so that the frequency coincides with a target value and the output of the loop filter, and switches that supply the loop filter with the output of the phase comparator or the output of the subtractor.