The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 08, 2011
Filed:
Aug. 16, 2004
Mutsumi Kitamura, Nagano, JP;
Naoto Fujishima, Nagano, JP;
Mutsumi Kitamura, Nagano, JP;
Naoto Fujishima, Nagano, JP;
Abstract
A semiconductor device and a method of fabrication thereof includes a bidirectional device having a high breakdown voltage and a decreased ON voltage. An n-type extended drain region is formed in the bottom surface of each trench. A p-type offset region is formed in each split semiconductor region. First and second n-source regions are formed in the surface of the p-type offset region. This reduces the in-plane distance between the first and second n-source regions to thereby increase the density of cells. The breakdown voltage is maintained along the trenches. This increases the resistance to high voltages. Channels are formed in the sidewalls of the trenches by making the voltage across each gate electrode higher than the voltage across each of the first and second n-source electrodes. Thus, a bidirectional LMOSFET through which current flows in both directions is achieved. The LMOSFET has a high breakdown voltage and a decreased ON voltage.