The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 15, 2011
Filed:
Apr. 27, 2009
Koji Takemura, Osaka, JP;
Hiroshige Hirano, Nara, JP;
Yutaka Itoh, Kyoto, JP;
Hikari Sano, Hyogo, JP;
Masao Takahashi, Kyoto, JP;
Koji Koike, Osaka, JP;
Koji Takemura, Osaka, JP;
Hiroshige Hirano, Nara, JP;
Yutaka Itoh, Kyoto, JP;
Hikari Sano, Hyogo, JP;
Masao Takahashi, Kyoto, JP;
Koji Koike, Osaka, JP;
Panasonic Corporation, Osaka, JP;
Abstract
A semiconductor device includes at least three or more wiring layers stacked in an interlayer insulating film on a semiconductor substrate, a seal ring provided at the outer periphery of a chip region of the semiconductor substrate and a chip strength reinforcement provided in part of the chip region near the seal ring. The chip strength reinforcement is made of a plurality of dummy wiring structures and each of the plurality of dummy wiring structures is formed to extend across and within two or more of the wiring layers including one or none of the bottommost wiring layer and the topmost wiring layer using a via portion.