The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 08, 2011
Filed:
Sep. 24, 2009
Yan Chong, San Jose, CA (US);
Joseph Huang, Morgan Hill, CA (US);
Chiakang Sung, Milpitas, CA (US);
Eric Choong-yin Chang, Cupertino, CA (US);
Peter Boyle, Mountain View, CA (US);
Adam J. Wright, Saratoga, CA (US);
Yan Chong, San Jose, CA (US);
Joseph Huang, Morgan Hill, CA (US);
Chiakang Sung, Milpitas, CA (US);
Eric Choong-Yin Chang, Cupertino, CA (US);
Peter Boyle, Mountain View, CA (US);
Adam J. Wright, Saratoga, CA (US);
Altera Corporation, San Jose, CA (US);
Abstract
Delay associated with each of two signals along respective transmission paths is accurately measured using a delay measurement circuit that is fabricated in situ on the actual device where the circuitry for propagating the two signals is fabricated. Thus, the measured delay associated with each of the two signals is subject to the same fabrication-dependent attributes that affect the actual circuitry through which the two signals will be propagated during operation of the device. The skew between the two signals is quantified as the difference in the measured delays. Coarse and fine delay modules are defined within the transmission path of each of the two signals. Based on the measured skew between the two signals, the coarse and fine delay modules are appropriately set to compensate for the skew. The appropriately settings for the coarse and fine delay modules can be stored in non-volatile memory elements.