The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 08, 2011
Filed:
Oct. 31, 2007
Max Levy, Essex Junction, VT (US);
Dale Martin, Hyde Park, VT (US);
Gerd Pfeiffer, Poughquag, NY (US);
James A. Slinkman, Montpelier, VT (US);
Max Levy, Essex Junction, VT (US);
Dale Martin, Hyde Park, VT (US);
Gerd Pfeiffer, Poughquag, NY (US);
James A. Slinkman, Montpelier, VT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A method of forming a semiconductor-on-insulator (SOI) substrate using a thermal annealing process to provide a semiconductor base wafer having a thin high resistivity surface layer that is positioned at the interface with the buried insulating layer is provided. Specifically, the inventive method fabricates an a semiconductor-on-insulator (SOI) substrate having an SOI layer and a semiconductor base wafer that are separated, at least in part, by a buried insulating layer, wherein the semiconductor base wafer includes a high resistivity (HR) surface layer located on a lower resistivity semiconductor portion of the semiconductor base wafer, and the HR surface layer forms an interface with the buried insulating layer.