The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 08, 2011
Filed:
Jan. 15, 2009
Ming-chyi Liu, Hsinchu, TW;
Yuan-hung Liu, Hsinchu, TW;
Gwo-yuh Shiau, Hsinchu, TW;
Yuan-chih Hsieh, Hsinchu, TW;
Chi-hsin Lo, Hsinchu County, TW;
Chia-shiung Tsai, Hsinchu, TW;
Ming-Chyi Liu, Hsinchu, TW;
Yuan-Hung Liu, Hsinchu, TW;
Gwo-Yuh Shiau, Hsinchu, TW;
Yuan-Chih Hsieh, Hsinchu, TW;
Chi-Hsin Lo, Hsinchu County, TW;
Chia-Shiung Tsai, Hsinchu, TW;
Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;
Abstract
A method for forming a semiconductor device with a bonding pad is disclosed. A first substrate having a device area and a bonding area is provided, wherein the first substrate has an upper surface and a bottom surface. Semiconductor elements are formed on the upper surface of the first substrate in the device area. A first inter-metal dielectric layer is formed on the upper surface of the substrate in the bonding area. A lowermost metal pattern is formed in the first inter-metal dielectric layer, wherein the lowermost metal pattern serves as the bonding pad. An opening through the first substrate is formed to expose the lowermost metal pattern.