The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 01, 2011
Filed:
Jun. 17, 2008
Elbert E. Huang, Tarrytown, NY (US);
Kaushik A. Kumar, Beacon, NY (US);
Kelly Malone, Poughkeepsie, NY (US);
Dirk Pfeiffer, Dobbs Ferry, NY (US);
Muthumanickam Sankarapandian, Yorktown Heights, NY (US);
Christy S. Tyberg, Mahopac, NY (US);
Elbert E. Huang, Tarrytown, NY (US);
Kaushik A. Kumar, Beacon, NY (US);
Kelly Malone, Poughkeepsie, NY (US);
Dirk Pfeiffer, Dobbs Ferry, NY (US);
Muthumanickam Sankarapandian, Yorktown Heights, NY (US);
Christy S. Tyberg, Mahopac, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
Interconnect structures having buried etch stop layers with low dielectric constants and methods relating to the generation of such buried etch stop layers are described herein. The inventive interconnect structure comprises a buried etch stop layer comprised of a polymeric material having a composition SiNCOH, where 0.05≦v≦0.8, 0≦w≦0.9, 0.05≦x≦0.8, 0≦y≦0.3, 0.05≦z≦0.8 for v+w+x+y+z=1; a via level interlayer dielectric that is directly below said buried etch stop layer; a line level interlayer dielectric that is directly above said buried etch stop layer; and conducting metal features that traverse through said via level dielectric, said line level dielectric, and said buried etch stop layer.