The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 01, 2011
Filed:
Sep. 21, 2007
Akira Kawahashi, Komaki, JP;
Masahiro Sugimoto, Toyota, JP;
Akinori Seki, Shizuoka, JP;
Masakatsu Maeda, Suita, JP;
Yasuo Takahashi, Suita, JP;
Akira Kawahashi, Komaki, JP;
Masahiro Sugimoto, Toyota, JP;
Akinori Seki, Shizuoka, JP;
Masakatsu Maeda, Suita, JP;
Yasuo Takahashi, Suita, JP;
Toyota Jidosha Kabushiki Kaisha, Toyota-shi, Aichi-ken, JP;
Abstract
A method is set forth of forming an ohmic electrode having good characteristics on a SiC semiconductor layer. In the method, a Ti-layer and an Al-layer are formed on a surface of the SiC substrate. The SiC substrate having the Ti-layer and the Al-layer is maintained at a temperature that is higher than or equal to a first temperature and lower than a second temperature until all Ti in the Ti-layer has reacted with Al. The first temperature is the minimum temperature of a temperature zone at which the Ti reacts with the Al to form AlTi, and the second temperature is the minimum temperature of a temperature zone at which the AlTi reacts with SiC to form TiSiC. As a result of this maintaining of temperature step, an AlTi-layer is formed on the surface of the SiC substrate. The method also comprises further heating the SiC substrate having the AlTi-layer to a temperature that is higher than the second temperature. As a result of this step of further heating the SiC substrate reacts with AlTi of the AlTi-layer to form a TiSiC-layer on the surface of the SiC substrate.